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lightner-photo
 

Selected Professional Vitae

 

 

Michael R. Lightner
University of Colorado
College of Engineering and Applied Science
570 UCB
Boulder, CO 80309-0570
303-492-5180
lightner@boulder.colorado.edu

 

 

 

Present position:


Professor, Department of Electrical and Computer Engineering
Professor (by courtesy), Department of Computer Science
Professor (joint appointment), Department of Rehabilitation Medicine
co-Director b l u r r lab - Digital Innovation Lab

Fellow, Univ. of Colorado Center for the Integrative Study of Work

 

Education:


• Ph.D. in Electrical Engineering from Carnegie-Mellon University, 1979
• M.S .Electrical Engineering from the University of Florida, 1974
• B.S. with high honors, Electrical Engineering from University of Florida, 1972

 

Professional Experience:

 

University of Colorado, System
 

Senior Engineering Consultant, Coleman Institute for Cognitive Disabilities


July 2002 - present

Associate Executive Director,
Coleman Institute for Cognitive
Disabilities


Aug. 1, 2001 – June 30, '02
Interim Director, Coleman Institute
for Cognitive Disabilities
Feb. 2001 – July 31, 2001
 
University of Colorado, Boulder
 

Associate Dean for Special
Projects, College of Engineering

 

2000 – June 30, 2002

Co Director of Blurr: Digital
Innovation Lab

 

2000 - present

Associate Dean for Academic
Affairs, College of Engineering

 

1997 - 2000

Professor, Electrical and
Computer Engineering

 

July 1989- present

Associate Professor, Electrical
and Computer Engineering

 

September 1983 - 1989
Assistant Professor - Electrical
and Computer Engineering
September 1981 - 1983

 

Other positions

 

Visiting Faculty, Computer
Science Dept. University of British Columbia

 

Summer 1990

AT&T Bell Labs, Murray Hill, New Jersey - Visiting Member of Technical Staff

 

September 1987 - August 1988 (sabbatical year)

Assistant Professor - Electrical Engineering - University of Illinois

 

August 1979 -1981

Research Assistant Professor - Coordinated Science Laboratory

 

August 1979 - 1981
Summer Faculty, Mathematical Sciences Department, IBM Watson Research Center Summer 1982

 

Awards:

  • IEEE CAS Society Golden Jubilee Medal, 2000
  • IEEE Third Millennium Medal , 2000
  • Elected IEEE Fellow, 1997
  • Received the College of Engineering Max Peters Award for Outstanding Service, 1997
  • Received the inaugural John and Mercedes Peeples Innovation in Teaching Award, 1996
  • Received the College of Engineering Hutchinson Award for Outstanding Teaching in the College, 1995
  • Distinguished Service Award from IEEE for Serving as Editor of IEEE Transactions on Computer-aided Design
  • Received Best Paper Award at the 1989 Hawaii International Conference on System Sciences for "The Boulder Optimal Logic Design System, co-authored by G. Hachtel, M. Lightner, K. Bartlett, D. Bostick, R. Jacoby, P. Moceyunas, C. Morrison, X. Du, E. Schwarz.
  • Received AEA Outstanding Researcher Educator Award for 1987 by the Mountain States Council of the American Electronics Association.
  • 1983 NSF Presidential Young Investigator

Professional Service

  • IEEE Vice President for Publication Services and Products Board - 2003
  • IEEE Vice President for Technical Activities, 2002
  • Chair IEEE Technical Activities Board (TAB) Products Committee 1999, 2000
  • IEEE TAB Society Presidents' Forum Chair 2001
  • Member IEEE Nominations and Appointments Committee 2000 - present
  • Member IEEE TAB Finance Committee 2000 - present
  • Division Director I, IEEE, 1998, 1999
  • Member IEEE Tab Management Committee 1997-99
  • Member of the IEEE TAB, GOLD and Audit Committees 1997- 99
  • Member of the IEEE Products Committee 1999-01
  • Executive Committee of the Design Automation Conference, 1997 - 2000
  • Past President, IEEE Circuits and Systems Society, 1997
  • President, IEEE Circuits and Systems Society, 1996
  • Member IEEE Tab Management Committee 1997-99
  • Chair, CU Privilege and Tenure Committee, 1995, 1997 -- 4 campus grievance committee
  • Member, Boulder Faculty Assembly
  • President-Elect, IEEE Circuits and Systems Society, 1995
  • Vice President, Technical Activities IEEE Circuits and Systems Society, 1991-93
  • Program Chairperson, 1993 International Conference on Computer Aided Design.
  • Chair University of Colorado Council on Research and Creative Work
  • Technical Program Chairperson, 1992 International Conference on Computer Aided Design.
  • Technical Committee of the European Design Automation Conference, 1993
  • Technical Program Chair of IEEE VLSI Winter Workshop, 1992, 1993
  • Technical Committee of Winter Simulation Meeting, 1992
  • Director of Graduate Studies, Department of Electrical and Computer Engineering,
    July 1989 - 1992
  • Secretary Treasurer, IEEE Technical Committee on Computer-Aided Network Design (CANDE) 1985-87
  • Chair, IEEE Technical Committee on Computer-Aided Network Design (CANDE) 1987-89
  • Member Technical Program Committee 1984-1988 International Conference on Computer Aided Design.
  • Member, Administrative Committee (AdComm) of the IEEE Circuits and Systems Society (elected position).
  • Chaired sessions at each ICCAD 1984-1988
  • Member International Organizing Committee 1984 European Simulation Meeting.
  • Member of Technical Program Committee, 1987 International Logic Synthesis Workshop
  • Member of Technical Program Committee, 1989 International Behavioral Synthesis Workshop
  • Presented invited tutorial on Modeling and Simulation at 1989 and 1988 Custom Integrated Circuits Conferences
  • Chair for Special Session on Logical Design for VLSI, 1982 ISCAS, April 1982.
  • Chair and Organizer for Special Session on Applications of Optimization to Circuit Design, 1981 ISCAS, April 1981. Editorial Service
  • Associate Editor on new ACM Journal Transactions on Electrical Design Automation
  • General Chair 1993 IEEE/ACM International Conference Computer-Aided Design
  • Series Editor Oxford University Press
  • Member ad hoc ACM/SIGMA Committee to found an electronic journal on CAD (TODAES)
  • Member of IEEE Press Editorial Board
  • Editor, IEEE Transactions on Computer Aided Design, June 1989-June 1991.
  • Associate Editor, IEEE Transactions on Computer Aided Design
  • Associate Editor, IEEE Circuits and Devices Magazine
  • Series Editor, Saunders Publishing Company - Series in Computer Engineering
  • Member Editorial Board of CAD/CAM Abstracts - Bowers Publishing.
  • Series Editor, Holt, Rinehart and Winston - Series in Computer Engineering

Selected Presentations

  • Presentation at AAMR annual meeting, June 2002 – “Awareness as the Unifying Metaphor of Current Caregiver Practice and Advances in Technology”
  • Keynote speaker, IEEE Asia Pacific Circuits and Systems Society, Seoul, Korea, December 1996
  • Presented talk at the SASIMI Conference,Japan,
    December 1996
  • Invited talk at Osaka University, OsakaJapan, December,1996
  • Invited talk at the University of Hong Kong, April, 1996
  • Paper presented at the Frontiers in Education Conference “A Paperless Laboratory for Circuits and Electronics” November 1996
  • Presented talk on Validating and Synthesizing Behavioral VHDL Descriptions to research group of Matshushita Electrical in Osaka, Japan, August 1995
  • Presented talk on Validating and Synthesizing Behavioral VHDL Descriptions to research Fujitsu Semiconductor, Japan, August 1995
  • Presented lecture on “Relationships between semantic models of concurrent systems and parallel Digital Simulation” Computer Science Department, University of Leiden, Leiden, The Netherlands, 1995
  • Invited panelist on Future Research Directions for Circuits and Systems at 1989 ISCAS
  • Invited talk at Quinhua University, Beijing, China
  • Invited talk at 1st International Conference on Semiconductor Processing and Design, Beijing, China
  • Invited Participant at the NATO Advanced Study Institute on Computer Design Aids for VLSI Circuits, Urbino, Italy, July 1980.

Publications:

  • “ Data Sonification for Detection of Digital Communication Signals in Low SNR Settings”, Prof. M. Lightner, K. Arehart, R. Muelheisen, S. Johnson, J. Greisbach, in preparation.
  • J.D. Griesbach, M. Lightner, D. Etter, "Mean Square Error Analysis of
    Non-Uniform Subband Adaptive Filters for System Modeling", IEEE Transactions on Signal Processing, accepted
  • J.D. Griesbach, M. Lightner, D. Etter, "Constituent Subband Allocation for System Modeling Non-Uniform Subband Adaptive Filters", IEEE Transactions on Signal Processing, accepted
  • J.D. Griesbach, M. Lightner, D. Etter, "Subband Adaptive Filtering
    Decimation Constraints for Oversampled Non-Uniform Filterbanks", IEEE Transactions on Circuits and Systems II, 2002, vol. 49, no. 10, pp. 677-681
  • J.D. Griesbach, M. Lightner, D. Etter, "Subband MMSE Bounds for Filterbank Adaptation in Non-Uniform System Modeling Subband Adaptive Filters", ICASSP-01: IEEE International Conference on Acoustics, Speech, and Signal Processing, 2001, vol. 6, pp. 3709-3712
  • J.D. Griesbach, M. Lightner, "Rationally Decimated Constituent-Based
    Filterbanks for Subband Adaptive Filters", 33rd Asilomar Conference on
    Signals, Systems, and Computers, 1999, vol. 2, pp. 908-911
  • J.D. Griesbach, M. Lightner, D. Etter, "Spectral Domain (MMSE) Estimators for Non-Uniform System Modeling Subband Adaptive Filters", 34th Asilomar Conference on Signals, Systems, and Computers, 2000, vol. 2, pp. 1489-1493
  • “ Subband Adaptive Filtering Decimation Constraints for Oversampled Non-uniform Filterbanks”, J. D. Griesbach, M. Lightner, and D. M. Etter to appear, IEEE Transactions on Circuits and Systems II – 2003.
  • " Virtual Circuit Laboratory", Hess Hodge, H. Scott Hinton, Michael R. Lightner ASEE Journal of Engineering Education, October 2001
  • " A Technology-Enhanced Learning Environment for a Graduatae/Undergraduate Course on Optical Fiber Communications," H. Scott Hinton, Roberto Gonzalez, Laura L. Tedder, Sandeep Karandikar, Harpreet Behl, Paul C. Smith, John Wilbanks, James Humphrey, Murray Gordon, Michael R. Lightner, ASEE Journal of Engineering Education, October 2001
  • “ The See-Through Building” As an Educational Tool” , Transactions of the IEEE Special Issue on Electrical and Computer Engineering Education January 2000.
  • " Spectral Domain MMSE Estimators for Non-Uniform System Modeling Subband Adaptive Filters," Jacob D. Griesbach, Michael Lightner, and Delores M. Etter in 34th Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, October 29-1, 2000. IEEE.
  • “ The Influence of Two Level Optimization on the Area and Routability of FSMs Embedded in Lookup Table FPGAs” Proceedings of the 1995 International Workshop on Logic Synthesis, May 1995
  • “Behavorial Validation of VHDL” Proceedings of 1995 Sasimi Conference, Nara, Japan, August, 1995. A. Alkar and M. Lightner
  • " Technology Independent Estimation of Area and Delay in Logic Synthesis" Q. GI, Y.-S. Oh, M. R. Lightner, and F. Somenzi. In SASIMI '92 pages 171-180, Kyoto, Japan, April, 1992.
  • " Program Restructuring and Parallel Extraction of VHDL for Parallel Simulation, pp. 81-87, B. Vellandi and M. Lightner, Proceedings of 1992 European Design Automation Conference, Brussels March 16, 1992.
  • " Periodic Don't Cares and Sequential Synthesis", D. Bostick and M. Lightner Proceedings of the 1991 MCNC Logic Synthesis Workshop.
  • A. Sazegari, R. Byrd, M. Lightner, "Fast Algorithms for Best Real Rational Approximations," in SIAM Conference on Optimization, April 1989.
  • W. G. Bliss and M. R. Lightner, "The Reliability of Large Arrays for Matrix Multiplication with Algorithm-Based Fault-Tolerance," 3rd Workshop on Wafer-scale Integration, co-sponsored by AICA, AEI (Milano), Como, Italy, June 8, 1989.
  • M. R. Lightner and S. W. Director, ``Multiple Criterion Optimization for Electronic Circuits,'' IEEE Trans. on Circuits sand Systems, Vol. CAS-28, pp. 169-179, Mar. 1981.
  • D. E. Hocevar, M. R. Lightner, and T. N. Trick,"An Extrapolated Yield Approximation Technique for Use in Yield Maximation," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume CAD-3, Number 4, pp. 279-287, October 1984.
  • M. R. Lightner, G. D. Hachtel, R. H. Byrd, M. H. Heydemann, "A Theory and Algorithmic Frame for Switch Level Simulation," Simulation in Research and Development, A. Javor (ed.), Elsevier Science Publishers B.V., (North-Holland)."Program Restructuring and Parallel Extraction of VHDL for Parallel Simulation, pp. 81-87,
  • B. Vellandi and M. Lightner, Proceedings of 1992 European Design Automation Conference, Brussels March 16, 1992.
  • " Periodic Don't Cares and Sequential Synthesis", D. Bostick and M. Lightner Proceedings of the 1991 MCNC Logic Synthesis Workshop.
  • "Technology Independent Estimation of Area and Delay in Logic Synthesis" Q. Ji, Y.-S. Oh, M.R. Lightner, and F. Somenzi. In SASIMI '92 pages 171-180, Kyoto, Japan, April, 1992.
  • " Technology Independent Estimation of Area and Delay in Logic Synthesis" Q. Ji, Y.S. Oh, M. Lightner and F. Somenzi, Proceedings of Sasimi Conference, April 1992, Kobe, Japan.
  • W. G. Bliss and M. R. Lightner, "The Reliability of Large Arrays for Matrix
    Multiplication with Algorithm-Based Fault-Tolerance," 3rd Workshop
    on Wafer-scale Integration, co-sponsored by AICA, AEI (Milano), Como, Italy, June 8, 1989
  • G. Colon-Bonet, E. M. Schwarz, D. G. Bostick, G. D. Hachtel, M. R. Lightner,
    " On Optimal Extraction of Combinational Logic and Don't Care Sets
    from Hardware Description Languages," IEEE International Conference on Computer-Aided Design, November 6-9, 1989.
  • G. D. Hachtel, M. R. Lightner, and H.J. Kelly, ``Application of the
    Optimization Program AOP to the Design of Memory Circuits,''
    IEEE Trans. Circuits and Systems, Vol. CAS-22, No. 6, June 1975.
  • S. W. Director, A. W. Westerberg, and M. R. Lightner, ``Simulation
    Procedures for Large Scale Electronics Systems,'' (Invited Paper)
    Journal of the Institution of Electronic and Telecommunication
    Engineers, Vol. 24, No. 7, pp. 271-285, July 1978.
  • S. N. Tulukdar, M. R. Lightner, and R. L. Koo, ``Multiobjective
    Optimization Procedures for Power System Problems,'' Proc. of
    IEEE Power Engineering Society Summer Meeting, Vancouver,
    British Columbia, Canada, July 15-20, 1979.
  • M. R. Lightner and S. W. Director, ``Multiple Criterion Optimization
    for Electronic Circuits,'' IEEE Trans. on Circuits sand Systems, Vol. CAS-28, pp. 169-179, Mar. 1981.
  • M. R. Lightner and S. W. Director, ``Multiple Criterion Optimization
    with Yield Maximization,'' IEEE Trans. Circuits and Systems,
    Vol. CAS-28, no. 8 , pp. 781-790, Aug. 1981.
  • G. Cortelazzo, M. R. Lightner, and W. K. Jenkins,
    ``An Alternate Technique for Min-Max Design of Multiband Finite Impulse
    Response Digital Filters, Journal of Circuits, Systems,
    Signal Processing, Vol. 2, no. 3, 1983.
  • D. E. Hocevar, M. R. Lightner, and T. N. Trick,"An Extrapolated Yield Approximation Technique for Use in Yield Maximation," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume CAD-3, Number 4, pp. 279-287, October 1984.
  • D. E. Hocevar, M. R. Lightner, and T. N. Trick, ``A Study of Variance Reduction Techniques for Estimating Circuit Yield,'', Vol. CAD-2, no. 3, IEEE Trans. on CAD of Integrated Circuits and Systems, pp. 180-191, July 1983.
  • G. Cortelazzo and M. R. Lightner, "Simultaneous Design in Both Magnitude and Group-Delay of IIR and FIR Filters Based on Multiple Criterion Optimization," IEEE Transactions on Acoustics, Speech, and Signal Processing, Volume ASSP-32, No. 5, October 1984, pp 949-967.
  • M. R. Lightner and G. Cortelazzo, ``A Survey of the Use of Optimization for the Design of Digital Filters,'' to be submitted to the IEEE Trans. on CAD of Integrated Circuits and Systems.
  • G. Cortelazzo and M. R. Lightner, ``The Use of Multiple Criterion Optimization for Frequency Domain Design of Non Causal IIR Filters,'' IEEE Trans. on Acoustics, Speech and Signal Processing, February 1985, Vol. ASSP-33, Vol. 1, no. 1, pp. 126-135.
  • G. Cortelazzo and M. R. Lightner, "On the Design of Digital Filters with Monotonic Transition Regions Using 'Don't Care' Bands," Transactions of Illinois Academy of Sciences, Volume 77, 3 and 4, 1984, pp. 261-270.
  • R. Byrd, G. D. Hachtel, and M. R. Lightner, "Switch Level Simulation, Part I: Theory and Algorithmic Frame," submitted to IEEE Transactions on Computer Aided Design.
  • G. D. Hachtel, M. R. Lightner, M. R. Faucher, M. H. Heydemann, "Switch Level Simulation, Part II: Bottleneck Shortest Path Algorithm," submitted to IEEE Transactions on Computer Aided Design.
  • M. R. Lightner, "Modeling and Simulating VLSI Digital Systems - A Tutorial," Proceedings of the IEEE, Volume 75, No. 6, June 1987, pp. 786-796.


Books and Book Chapters:

  • M. R. Lightner, The RF and Microwave Handbook, "Time Domain Computer-Aided Circuit Simulation" edited by Mike Golio, CRC Press November 2000
  • S. W. Director and M. R. Lightner, ``Computer-Aided Design'' Section 27 of Electronics Engineers' Handbook, Second Edition , McGraw-Hill 1982.
  • R. Byrd, G. D. Hachtel, M. R. Lightner and M. Heydemann, ``Switch
    Level Simulation-Models: Theory and Algorithms,'' pp 1-70 in ``Computer-Aided Design,'' edited by A. Sangiovanni-Vincentelli, Jai Press.


Conference Publications and Presentations

  • “The Influence of Two Level Optimization on the Area and Routability of FSMs Embedded in Lookup Table FPGAs” Proceedings of the 1995 International Workshop on Logic Synthesis, May 1995
  • M. R. Lightner and S. W. Director, ``Yield Maximization and Multiple Criteria Optimization of Electronic Circuits,'' (invited presentation), Proceedings of 1978 Midwest Circuit Theory Symposium, August 1978.
  • M. R. Lightner and S. W. Director, ``Multiple Criterion Optimization of Electronic Circuits,'' Proceedings of IEE Int. Conf. on Computer Aided Design and Manufacture of Electronic Components, Circuits and Systems, Univ. of Sussex, England, July 1979.
  • M. R. Lightner and S. W. Director, ``Yield Maximization for Use in Multiple Criterion Optimization of Electronic Circuits,'' Proceedings 1979 IEEE Int. Sym. on Circuits and Systems, Tokyo, Japan, July 1979.
  • M. R. Lightner, P. Yang, and C. Pahlmeyer, ``Piecewise Nonlinear Analysis of Electronic Circuits,'' Proceedings of International Conference on Circuits and Computers, pp. 804-807, Port Chester, New York,
    October 1980.
  • G. Cortelazzo, M. R. Lightner, and W. K. Jenkins, ``Frequency Domain Design of Multiband FIR Digital Filters Based on the Minimax Criterion,'' 1981 Inter. Symp. on Cir. and Systems, Chicago, Illinois, April 1981.
  • M. R. Lightner and C. L. Pahlmeyer, ``Models and Algorithms to Speed DC Convergence in Bipolar Circuits,'' 24th Midwest Symposium on Circuits and Systems, June 29-30, 1981, Albuquerque, New Mexico, pp. 269-273.
  • M. R. Lightner and G. Cortelazzo, ``Multiple Objective Design of
    Digital Filters,'' 1982 IEEE International Conference on Acoustics, Speech, and Signal Processing, Paris, May 1982.
  • M. R. Lightner and G. D. Hachtel, ``Implication Algorithms for MOS Switch Level Functional Macromodeling, Extraction and Testing,'' 1982 Design Automation Conference, June 1982.
  • M.R. Lightner G. D. Hachtel, ``MOS Switch Level Simulation Macromodeling and Testing,'' invited paper 1982 IEEE Inter. Symp. on Circuits and Systems, May 1982.
  • V. Rao, T. N. Trick, and M. R. Lightner, ``Hazard Detection in a Multiple Delay Logic Simulator,'' 1982 Inter. Symp. on Circuits and Systems, May 1982.
  • M. Heydemann, G. D. Hachtel, and M. R. Lightner, ``Implementation Issues in Multiple Delay Switch Level Simulation,'' invited paper 1982 International
    Conference on Circuits and Computers, New York, NY, Sept. 1982.
  • D. Hocevar, M. R. Lightner and T. Trick, ``A Study of Variance Reduction
    Techniques for Estimating Circuit Yields,'' Proceedings of 1983 IEEE International
    Symposium on Circuits and Systems, May 1983.
  • D. Hocevar, M. R. Lightner and T. Trick, ``Monte Carlo Based Yield Maximization
    with a Quadratic Model,'' Proceedings of the 1983 IEEE International Symposium on Circuits and Systems, May 1983.
  • G. Cortelazzo and M. R. Lightner, ``Simultaneous Design in Both Magnitude and Group-Delay of IIR and FIR Filters: Problems and Results,'' Proceedings of the 1983 IEEE International Conference on Acoustics, Speech and Signal Processing, May 1983.
  • V. Pulges and M. R. Lightner, ``Recursive Bipartitioning PLA Placement and Layout,'' 1984 International Conference on Computer Design.
  • Z. L. Mo and M. R. Lightner, ``A Two Parameter Delay Model for Switch Level Simulation,'' 1984 International Conference on Computer Design.
  • C. T. Bye, M. R. Lightner and D. L. Ravenscroft, ``A Functional Modeling and Simulation Environment based on ESIM and C,'' 1984 International Conference on Computer Aided Design.
  • D. E. Hocevar, M. R. Lightner, T. N. Trick, ``An Extrapolated
    Yield Approximation Techniques for Yield Maximization,'' Fifth International
    Symposium on Network Theory, September 1984, Sarajevo, Yugoslavia.
  • M. R. Lightner, G. D. Hachtel, R. H. Byrd, M. H. Heydemann,
    " A Theory and Algorithmic Frame for Switch Level Simulation,"
    Simulation in Research and Development, A. Javor (ed.),
    Elsevier Science Publishers B.V., (North-Holland).
  • M. R. Lightner, H. P. Mueller, B. Vellandi and H. Vellandi, "CSIM: The
    Evolution of a Behavioral Level Simulator from a Functional Simulator:
    Implementation Issues and Performance Measurements," Proceedings of 1985
    ICCAD, Nov. 1985, Santa Clara, CA.
  • W. Bliss, J. Girard, J. Avery, M. Lightner, and L. Scharf,
    " A Modular Architecture for Dynamic Programming and Maximum
    Likelihood Sequence Estimation," Proceedings 1986 ICASSP, April 1986, pp.
    357-360.
  • D. L. Ravenscroft and M. R. Lightner, "Functional Language Extractor
    and Boolean Cover Generator," IEEE International Conference on
    Computer Aided Design, November 11-13, 1986, Santa Clara, California,
    pp. 120-123.
  • F. Lombardi, M. R. Lightner, and W. K. Huang, "A Prediction and Fitting
    Method for Evaluating the Fault Coverage of Combinational Circuits
    Using Random Testing," Proceedings International Test Conference, 1987.
    D. Bostick, G. D. Hachtel, R. Jacoby, M.R. Lightner, P. Moceyunas,
    C. R. Morrison, D. Ravenscroft, "The Boulder Optimal Logic Design
    System," Proceedings of 1987 ICCAD.
  • W. Bliss and M. R. Lightner, "The Design of Fault Tolerant Arrays
    of Integer Arithmetic Multipliers," Proceedings of 1987 ICCAD.
  • G. D. Hachtel and M. R. Lightner, "Don't Care Conditions in Top Down
    Synthesis," Proceedings of 1987 ICCAD
  • W. Bliss and M. R. Lightner, "The VLSI Complexity of MAP Sequence
    Estimation," Proceedings, Twenty-first Asilomar Conference on
    Signals, Systems, and Computers, November 2-4, 1987.
  • W. Bliss and M. R. Lightner, "Fault Tolerant Two-Dimensional Arrays
    for L-U and Q-R Factorization," Proceedings, Twenty-first Asilomar
    Conference on Signals, Systems, and Computers, November 2-4, 1987.
  • W. Bliss and M. R. Lightner, " The VLSI Complexity of Maximum A Posteriori Sequence Estimation," 1988 Maple Press, Asilomar Conference 1987.
  • W. Bliss, B. Friedlander, and M. R. Lightner, " Numerical Properties of Algorithm Based Fault Tolerance for High Reliability Computation," May 7, 1988, Twenty-second Asilomar Conference on Signals, Systems, and Computers, November 1988.
  • M. Lightner and W. Wolf, " Experiments in Logic Synthesis," Proceedings of ICCAD 1988.
  • G. Hachtel, M. Lightner, D. Bostick, R. Jacoby, C. Keene, P. Moceyunas, C. Morrison, X. Du, E. Schwarz, "BOLD: The Boulder Optimal Logic Design System," Hawaii International Conference on System Sciences, 1988. Received Best Paper Award.
  • A. Sazegari, R. Byrd, M. Lightner, "Fast Algorithms for Best Real Rational
    Approximations," to appear in SIAM Conference on Optimization, April 1989.
  • W. G. Bliss and M. R. Lightner, "The Reliability of Large Arrays for Matrix Multiplication with Algorithm-Based Fault-Tolerance," 3rd Workshop on Wafer-scale Integration, co-sponsored by AICA, AEI (Milano), Como, Italy, June 8,1989.
  • G. Colon-Bonet, E. M. Schwarz, D. G. Bostick, G. D. Hachtel, M. R. Lightner,
    " On Optimal Extraction of Combinational Logic and Don't Care Sets from Hardware Description Languages," IEEE International Conference on Computer-Aided Design, November 6-9, 1989.


Technical Reports:

  • G. D. Hachtel and M. R. Lightner, ``Techniques for the Application of the ASTAP Compatible Optimization Program A20P to the Design of Memory Circuit,'' IBM Research Report RC 4573, October 11, 1973.
  • M. R. Lightner, ``Time Domain Simulation Using CAPECOD,'' Memorandum
    for File, File 36312-2, Bell Laboratories, North Andover, Massachusetts, August 21, 1979.
  • M. Lightner, W. Wolf, "Experiments in Logic Synthesis, AT&T Bell Labs, Technical
    Memorandum, 1988.R. Melville, M. Lightner, "Efficient Sensitivity Computations for IC Parasitics," AT&T Bell Labs, Technical Memorandum, 1988.
  • Solutions Manual for ``Circuit Theory - A Computational Approach,'' by M. Lightner
    S. W. Director, John Wiley and Sons, 1975.
  • M. R. Lightner, ``The Interfaces between Circuit Theory and Computer
    Aided Design.'' invited presentation, 1981 Midwest Circuit Theory
    Symposium, Albuquerque, NM 1981.
  • M. H. Heydemann, M. R. Lightner, G. D. Hachtel, ``Algorithms for Multiple Delay Switch Level Simulation,'' invited presentation 1982 Design Automation Workshop, October, 1982.
  • M. R. Lightner, ``VLSI-CAD Use in Undergraduate Classes,'' presented at 1984 ASEE Rocky Mountain Section Annual Meeting.
  • M. R. Lightner, ``Computer Aided Design for VLSI,'' 1984 Engineering Horizons.
  • M. R. Lightner, ``VLSI CAD at CU Boulder,'' presented to CU Directors
    Club 1984 Summer Meeting.
  • M. R. Lightner, ``VLSI - The Future is Here Now,'' CU Engineering Magazine,
    1984 Winter Issue.